Ray Ontko's Simulator

One of the biggest changes in the fourth edition of Tanenbaum's book, Structured Computer Organization, was a new example microarchitecture (the model for this simulator). When the new edition came out, Ray Ontko and Dan Stone wrote a simulator for the new architecture (available at https://www.ontko.com/mic1 ). This simulator is file-compatible with Ontko's simulator. That is, it will load and run microprograms ("mic1" files) created using Ontko's micro assembly language assembler and it will load and run machine language programs ("ijvm" files) generated by Ontko's java assembly language assembler. However, there are some implementation errors in Ontko's implementation that are corrected in this simulator.

Misinterpretation of INC Bit

The INC control signal is applied only to the low-order bit of the ALU. Setting the INC bit high increments the value generated by the ADD operation. It has no effect whatsoever on the value generated by the AND, OR, or NOT operations. However, Ontko's micro assembly language assembler perpetuates an error in Tanenbaum's text (in the next to the last line of the table on page 206) by attempting to use the bit pattern 010001 to generate a value of 1 in the ALU. This bit pattern performs an OR operation on zero and zero which yields zero. If setting INC high incremented this value, the result would be correct. However, since the INC bit has no effect on the result of an OR operation, this bit pattern actually generates a value of zero:

FFEEII
01NNNN
  ABVC
    A 
------
010001  ALU=  0

The correct bit pattern is 110001 (add zero and zero and increment the result which yields one):

FFEEII
01NNNN
  ABVC
    A 
------
110001  ALU=  1

The statement "H=OPC= 1" appears four times in Ontko's machine language interpreter in the section of code that interprets the ERR instruction (an addition to Tanenbaum's instruction set). Each of these occurrences is incorrectly assembled with ALU control bits of "010001" instead of "110001". Ontko's micro assembly language code is correct but the assembled executable microprogram is not. The machine language interpreter provided with this simulator (ijvm.mic) fixes this problem.

Limited Branching

Microprogram branching is incorrectly implemented in Ontko's simulator. His simulator is written with the assumption that, at most, only one of the jump bits (JMPN, JMPZ, or JMPC) will be set in any given microinstruction. In fact, any combination of jump bits may be set at the same time. Consider this example:

Next Addr|JJJ|SSFFEEII|HOTCLSPMM|WRF|B
         |MAA|LR01NNNN| POPVPCDA|REE|Bus
         |PMM|LA  ABVC| CSP   RR|IAT|
         |CNZ|81    A |         |TDC|
         |   |        |         |E H|
000000001 011 00000000 000000000 000 0000

This instruction means "ALU=0; if (N or Z) goto 0x101 else goto 0x1". Since the value generated by the ALU is zero, the microprogram should branch to 0x101. However, in Ontko's simulator, the branch fails. When decoding a microinstruction, Ontko's simulator checks the jump bits using this logic:

if (JMPN) {
    decode JMPN
}
else if (JMPZ) {
    decode JMPZ
}
else if (JMPC) {
    decode JMPC
}

Note that once a set jump bit is found, this logic stops checking the remaining jump bits. In the example above, this logic finds the JMPN bit set and goes no further. The microinstruction is incorrectly decoded as "ALU=0; if N goto 0x101 else goto 0x1". This simulator properly decodes all combinations of set jump bits.